Digital-Electronics Obstacle Course - Revision history

Aplstudent: /* Materials to borrow when necessary */

2017-05-16T21:53:39Z

Materials to borrow when necessary

← Older revision		Revision as of 21:53, 16 May 2017
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	=== Materials to borrow when necessary ===		=== Materials to borrow when necessary ===
	- LTSpice circuit simulation software (on computers in lab)<br>		- LTSpice circuit simulation software (on computers in lab)<br>
	- ~~lab copy of~~ ''The Art of Electronics'', Horowitz & Hill (H&H)<br>		- ''The Art of Electronics - 2nd Edition'', Horowitz & Hill (H&H)<br>
	- inductance meter<br>		- inductance meter<br>
	- Keithley voltage supply		- Keithley voltage supply

Wikiuser at 15:39, 10 April 2015

2015-04-10T15:39:29Z

← Older revision		Revision as of 15:39, 10 April 2015
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	# Read Chapters 10 and 11 of Keith Brindley's eBook ''Starting Electronics''.		# Read Chapters 10 and 11 of Keith Brindley's eBook ''Starting Electronics''.
	* '''CLEAN UP THE OBSTACLE COURSE SETUP AFTER USE - PUT BACK ELECTRONIC COMPONENTS IN APPROPRIATE PLACES AFTER EACH ACTIVITY'''		* '''CLEAN UP THE OBSTACLE COURSE SETUP AFTER USE - PUT BACK ELECTRONIC COMPONENTS IN APPROPRIATE PLACES AFTER EACH ACTIVITY'''
			* Keep a journal of your activities, results and answers to any questions asked in the activities below. You will use this for your write-up.


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	===== FPGAs =====		===== FPGAs =====
	[http://en.wikipedia.org/wiki/Field-programmable_gate_array Field-Programable Gate Arrays] (FPGAs) are chips of thousands (or more!) of logic gates. These gates can be configured (and often reconfigured) for the chips to perform various tasks. Often, the chip's action can be defined through a variety of specific programming languages (e.g. VHDL) or visually via graphical layout systems. The code that is written is then compiled to tell the chip's logic gates how connect to perform the given task. This allows for creation of "hardware" that is flexible and can be modified simply, without needing to design and build an entire new circuit.		[http://en.wikipedia.org/wiki/Field-programmable_gate_array Field-Programable Gate Arrays] (FPGAs) are chips of thousands (or more!) of logic gates. These gates can be configured (and often reconfigured) for the chips to perform various tasks. Often, the chip's action can be defined through a variety of specific programming languages (e.g. VHDL) or visually via graphical layout systems. The code that is written is then compiled to tell the chip's logic gates how connect to perform the given task. This allows for creation of "hardware" that is flexible and can be modified simply, without needing to design and build an entire new circuit.<br>

			* Submit a write-up outlining your activities, results and the answers to all the questions asked above.


	* '''CLEAN UP THE OBSTACLE COURSE SETUP AFTER USE		* '''CLEAN UP THE OBSTACLE COURSE SETUP AFTER USE

Wikiuser: /* Activities */

2015-04-07T01:19:22Z

Activities

← Older revision		Revision as of 01:19, 7 April 2015
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	=== Activities ===		=== Activities ===

	* '''CLEAN UP THE OBSTACLE COURSE SETUP AFTER USE - PUT BACK ELECTRONIC COMPONENTS IN APPROPRIATE PLACES AFTER EACH ACTIVITY'''

	[[File:Traninverter.png\|right\|200px]]		[[File:Traninverter.png\|right\|200px]]
	# Read chapter 8 of Horowitz & Hill's ''The Art of Electronics''.		# Read chapter 8 of Horowitz & Hill's ''The Art of Electronics''.
	# Read Chapters 10 and 11 of Keith Brindley's eBook ''Starting Electronics''.		# Read Chapters 10 and 11 of Keith Brindley's eBook ''Starting Electronics''.
			* '''CLEAN UP THE OBSTACLE COURSE SETUP AFTER USE - PUT BACK ELECTRONIC COMPONENTS IN APPROPRIATE PLACES AFTER EACH ACTIVITY'''


	==== The Inverter or NOT Gate ====		==== The Inverter or NOT Gate ====
	# Using T1 = TIP31C, R = 10k, R2 = 1k, Vcc = 10VDC construct the circuit shown at the right.		# Using T1 = TIP31C, R = 10k, R2 = 1k, Vcc = 10VDC construct the circuit shown at the right.

Wikiuser at 01:18, 7 April 2015

2015-04-07T01:18:46Z

← Older revision		Revision as of 01:18, 7 April 2015
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	=== Activities ===		=== Activities ===

			* '''CLEAN UP THE OBSTACLE COURSE SETUP AFTER USE - PUT BACK ELECTRONIC COMPONENTS IN APPROPRIATE PLACES AFTER EACH ACTIVITY'''

	[[File:Traninverter.png\|right\|200px]]		[[File:Traninverter.png\|right\|200px]]
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	===== FPGAs =====		===== FPGAs =====
	[http://en.wikipedia.org/wiki/Field-programmable_gate_array Field-Programable Gate Arrays] (FPGAs) are chips of thousands (or more!) of logic gates. These gates can be configured (and often reconfigured) for the chips to perform various tasks. Often, the chip's action can be defined through a variety of specific programming languages (e.g. VHDL) or visually via graphical layout systems. The code that is written is then compiled to tell the chip's logic gates how connect to perform the given task. This allows for creation of "hardware" that is flexible and can be modified simply, without needing to design and build an entire new circuit.		[http://en.wikipedia.org/wiki/Field-programmable_gate_array Field-Programable Gate Arrays] (FPGAs) are chips of thousands (or more!) of logic gates. These gates can be configured (and often reconfigured) for the chips to perform various tasks. Often, the chip's action can be defined through a variety of specific programming languages (e.g. VHDL) or visually via graphical layout systems. The code that is written is then compiled to tell the chip's logic gates how connect to perform the given task. This allows for creation of "hardware" that is flexible and can be modified simply, without needing to design and build an entire new circuit.

			* '''CLEAN UP THE OBSTACLE COURSE SETUP AFTER USE

Wikiuser: /* Bistable Circuits - Flip-Flops - Digital Memory */

2015-02-25T23:24:04Z

Bistable Circuits - Flip-Flops - Digital Memory

← Older revision		Revision as of 23:24, 25 February 2015
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	#Build the flip-flop circuit shown at the right Using a proto-board, two [[Media:2N4401BU.pdf\| 2N4401BU]] transistors and LEDs. The two inputs, S and R are the switches and the outputs, Q and <math>\bar{Q}</math>, are the collector voltages (i.e. LEDs).		#Build the flip-flop circuit shown at the right Using a proto-board, two [[Media:2N4401BU.pdf\| 2N4401BU]] transistors and LEDs. The two inputs, S and R are the switches and the outputs, Q and <math>\bar{Q}</math>, are the collector voltages (i.e. LEDs).
	##When a switch is closed, what happens to the transistor's base-emitter voltage? Does this represent a low or high input to the ~~transistor~~?		##When a switch is closed, what happens to the transistor's base-emitter voltage? Does this represent a low or high input for the NOR gate?
	##Verify the S-R NOR latch function table.		##Verify the S-R NOR latch function table.

Wikiuser: /* Bistable Circuits - Flip-Flops - Digital Memory */

2015-02-25T23:20:55Z

Bistable Circuits - Flip-Flops - Digital Memory

← Older revision		Revision as of 23:20, 25 February 2015
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	Recall that the NOR gate is an inverting OR gate. Also recall that an OR gate's output is High when either (or both) of its inputs is High. So, a NOR gate's output is only High when '''both''' its inputs are Low.		Recall that the NOR gate is an inverting OR gate. Also recall that an OR gate's output is High when either (or both) of its inputs is High. So, a NOR gate's output is only High when '''both''' its inputs are Low.

	Now consider the NOR latch symbolic circuit shown at the right. Let's assume both S and R are initially High (S and R stand for Set and Reset respectively). Each NOR gate must then output a Low signal~~, as each NOR gate has one High input~~. Because the outputs of the NOR gates are cross-coupled, each will now one Low input (output of the other gate) and one High input ~~(S or R)~~.		Now consider the NOR latch symbolic circuit shown at the right. Let's assume both S and R are initially High (S and R stand for Set and Reset respectively). Each NOR gate must then output a Low signal. Because the outputs of the NOR gates are cross-coupled, each will now one Low input (output of the other gate) and one High input.

	If R is set to Low, the output of the R-gate must become High (both of its inputs are low). Since the output of the R-gate is cross-coupled to the input of the S-gate, the S-gate will remain Low (both inputs are high).		If R is set to Low, the output of the R-gate must become High (both of its inputs are low). Since the output of the R-gate is cross-coupled to the input of the S-gate, the S-gate will remain Low (both inputs are high).
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	Therefore, the output <math>\bar{Q}</math> is "latched" Low and Q is "latched" High regardless of subsequent changes in S. The outputs "remember" their states.		Therefore, the output <math>\bar{Q}</math> is "latched" Low and Q is "latched" High regardless of subsequent changes in S. The outputs "remember" their states.

	If we swap the roles of S and R above ~~(after both are low, keep S low and change R)~~, the analysis remains valid.		If we swap the roles of S and R above, the analysis remains valid.

Wikiuser: /* Bistable Circuits - Flip-Flops - Digital Memory */

2015-02-25T23:19:13Z

Bistable Circuits - Flip-Flops - Digital Memory

← Older revision		Revision as of 23:19, 25 February 2015
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	#~~build~~ the flip-flop circuit shown at the right Using a proto-board, two [[Media:2N4401BU.pdf\| 2N4401BU]] transistors and LEDs. The two inputs, S and R are the switches and the outputs, Q and <math>\bar{Q}</math>, are the collector voltages (i.e. LEDs).		#Build the flip-flop circuit shown at the right Using a proto-board, two [[Media:2N4401BU.pdf\| 2N4401BU]] transistors and LEDs. The two inputs, S and R are the switches and the outputs, Q and <math>\bar{Q}</math>, are the collector voltages (i.e. LEDs).
	##When a switch is closed, what happens to the transistor's base-emitter voltage? Does this represent a low or high input to the transistor?		##When a switch is closed, what happens to the transistor's base-emitter voltage? Does this represent a low or high input to the transistor?
	##Verify the S-R NOR latch function table.		##Verify the S-R NOR latch function table.

Wikiuser: /* FPGAs */

2015-02-25T23:18:44Z

FPGAs

← Older revision		Revision as of 23:18, 25 February 2015
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	===== FPGAs =====		===== FPGAs =====
	[http://en.wikipedia.org/wiki/Field-programmable_gate_array Field-Programable Gate Arrays] (FPGAs) are chips of thousands (or more!) of logic gates. These gates can be configured (and often reconfigured) for the chips to perform various tasks. Often, the chip's action can be defined through a variety of specific programming languages (e.g. VHDL). The code that is written is then compiled to tell the chip's logic gates how connect to perform the given task. This allows for creation of "hardware" that is flexible and can be modified simply, without needing to design and build an entire new circuit.		[http://en.wikipedia.org/wiki/Field-programmable_gate_array Field-Programable Gate Arrays] (FPGAs) are chips of thousands (or more!) of logic gates. These gates can be configured (and often reconfigured) for the chips to perform various tasks. Often, the chip's action can be defined through a variety of specific programming languages (e.g. VHDL) or visually via graphical layout systems. The code that is written is then compiled to tell the chip's logic gates how connect to perform the given task. This allows for creation of "hardware" that is flexible and can be modified simply, without needing to design and build an entire new circuit.

Wikiuser: /* FPGAs */

2015-02-25T23:16:10Z

FPGAs

← Older revision		Revision as of 23:16, 25 February 2015
Line 205:		Line 205:

	===== FPGAs =====		===== FPGAs =====
	[http://en.wikipedia.org/wiki/Field-programmable_gate_array Field-Programable Gate Arrays] (FPGAs) are chips of thousands (or more!) of logic gates. These gates can be configured and reconfigured ~~at will~~ for the chips to perform various tasks. Often, the chip's action can be defined through a variety of specific programming languages (e.g. VHDL). The code that is written is then compiled to tell the chip's logic gates how connect to perform the given task. This allows for creation of "hardware" that is flexible and can be modified ~~at will~~, without needing to design and build an entire new circuit.		[http://en.wikipedia.org/wiki/Field-programmable_gate_array Field-Programable Gate Arrays] (FPGAs) are chips of thousands (or more!) of logic gates. These gates can be configured (and often reconfigured) for the chips to perform various tasks. Often, the chip's action can be defined through a variety of specific programming languages (e.g. VHDL). The code that is written is then compiled to tell the chip's logic gates how connect to perform the given task. This allows for creation of "hardware" that is flexible and can be modified simply, without needing to design and build an entire new circuit.

Wikiuser: /* FPGAs */

2015-02-25T23:15:24Z

FPGAs

← Older revision		Revision as of 23:15, 25 February 2015
Line 205:		Line 205:

	===== FPGAs =====		===== FPGAs =====
	Field-Programable Gate Arrays (FPGAs) are chips of thousands (or more!) of logic gates. These gates can be configured and reconfigured at will for the chips to perform various tasks. Often, the chip's action can be defined through a variety of specific programming languages (e.g. VHDL). The code that is written is then compiled to tell the chip's logic gates how connect to perform the given task. This allows for creation of "hardware" that is flexible and can be modified at will, without needing to design and build an entire new circuit.		[http://en.wikipedia.org/wiki/Field-programmable_gate_array Field-Programable Gate Arrays] (FPGAs) are chips of thousands (or more!) of logic gates. These gates can be configured and reconfigured at will for the chips to perform various tasks. Often, the chip's action can be defined through a variety of specific programming languages (e.g. VHDL). The code that is written is then compiled to tell the chip's logic gates how connect to perform the given task. This allows for creation of "hardware" that is flexible and can be modified at will, without needing to design and build an entire new circuit.